BerojgarDegreeWalaSemiconductor & VLSI Portal
OpportunitiesNews & FeedAboutContact
BerojgarDegreeWala

India's premier platform for semiconductor & VLSI engineers: 100% verified research openings, VLSI Courses, professional network, and AI career tools.

Platform Services

Jobs & OpportunitiesVLSI CoursesProfessional NetworkCommunity ForumCandidate Registration (@username)Employer Registration PortalAsk AI AssistantAI Resume Builder

Job Categories

Junior Research Fellow (JRF)Senior Research Fellow (SRF)PhD & Doctoral AdmissionsGovernment Research JobsPrivate VLSI Engineering JobsInternships & FellowshipsDRDO Recruitment

Resources & Guides

Organizations DirectoryJRF Complete GuidePhD Admission GuideVLSI Career RoadmapContact Support

© 2026 BerojgarDegreeWala. Built for India's semiconductor & VLSI engineers.

Verified openings from DRDO, ISRO, CSIR, IITs & top fabless enterprises.

Back to Opportunities
B

Principal Debug Validation Engineer

BerojgarDegreeWala

JRFOfficial Link Verified

Description

Principal Embedded SW/FW Engineer (Bringup) - Austin, Tx, USA Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Candidate Profile Essential: Understanding of ML applications and their workloads A self-starter who can apply independent judgement A team player able to lead and support colleagues with difficult concepts Strong experience in Bare metal / embedded C/C++ Excellent problem-solving, analytical & diagnostic skills Ability to work across teams and programming languages to find root causes of critical and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to explain difficult concepts to resolve issues Desirable 5 to 10 years’ experience Experience building and leading, multi-site teams Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable. Experience of Arm CPUs, System IP and debug tools. Experience of AMBA protocols. Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,

Eligibility

  • BTech/MTech/MSc in Electronics/VLSI

Quick Facts

Position Type

JRF

Organization Type

Research

Work Location

Austin, Texas, United States

Compensation / Stipend

As per Organization Pay Matrix

Tags

GraphcoreSemiconductorPrivate Job
Apply NowVisit Official Organization Website

Quick Facts

LocationAustin, Texas, United States
TypeJRF
StipendAs per Organization Pay Matrix
Org. TypeResearch
Apply Now
Save Share

Quick Facts

Location

Austin, Texas, United States

Type

JRF

Stipend

As per Organization Pay Matrix

Org. Type

Research

Add to Calendar

AI Analysis & Insights

Analyzing...

Before you apply

  • • Always verify details on the official website
  • • Check for any updates or changes to the advertisement
  • • Deadlines and eligibility criteria may have changed
  • • BerojgarDegreeWala aggregates publicly available information

You might also like

?

New Careers & Internships

Official Link Verified
jrfIndia
Regular ListingApply
?

Software Engineering Opportunities

Official Link Verified
jrfIndia
Regular ListingApply
?

Hardware Engineering Opportunities

Official Link Verified
jrfIndia
Regular ListingApply