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RTL Design Engineer - Microelectronics Core
Intel India
FellowshipOfficial Link Verified38 days left (30 Sept 2026)
Apply by 30 Sept 2026
Description
Design logic for next-generation Intel Xeon processor IP cores. Implement SystemVerilog RTL, perform clock domain crossing (CDC) verification using SpyGlass, and collaborate with physical design teams.
Eligibility
- B.Tech / M.Tech in ECE / Computer Engineering.
Quick Facts
Position Type
Fellowship
Organization Type
Private
Work Location
Bangalore, India
Compensation / Stipend
₹18,000,000 - ₹28,000,000/year
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Quick Facts
Location
Bangalore, India
Type
Fellowship
Deadline
30 Sept 2026
Stipend
₹18,000,000 - ₹28,000,000/year
Org. Type
Private
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