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Back to jobsNewField Application Engineer - AI Software & Hardware Gdańsk, Pomeranian Voivodeship, PolandApplyTenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.We’re looking for a Field Application Engineer who’s wired for AI/ML, fluent in real-world problem-solving, and excited to build with the people actually using what we make. You will collaborate closely with the sales team and enterprise customers, leveraging your deep technical knowledge in AI to drive the adoption of our products and solutions. This is a customer-facing role that requires both technical expertise and excellent communication skills to convey complex technical concepts to non-technical stakeholders. This role is remote based out of Gdansk, Poland. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You’ve lived in the AI/ML trenches, whether as a field engineer, a solutions architect, or the one tapped in when things needed to “just work.” You speak both machine and human. Whether it’s a researcher or a skeptical executive, you know how to break things down and bring them to life. You’re fired up about generative models, LLMs, and the edge of what’s possible when software meets purpose-built silicon. Work directly with customers in meetings, presentations, and workshops to understand their technical challenges and provide effective solutions. Partner closely with sales operations and product teams to provide feedback from customers and help shape future product enhancements. What We Need Strong customer-facing skills with 5+ years of relevant technical, enterprise experience (such as Sales Engineer, Solutions Engineer, or Technical Account Manager). Your field insight will help shape our roadmap, our features, and the way we show up for developers. Proven expertise in AI technologies and frameworks, including machine learning, deep learning, natural language processing (NLP),computer vision, PyTorch or TensorFlow. Experience with embedded systems, FPGA Architecture or AI accelerators. Good understanding of data center, server architecture and deployment, thermal/power, and infrastructure management. What You Will Learn How to explore and push the boundaries of AI performance on custom silicon and help develope

Analog Devices

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Position available at official Analog Devices careers portal. Requisition: N/A

Intel India

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Position available at official Intel careers portal. Requisition: N/A

NXP Semiconductors

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Official opening at NXP Semiconductors. Role involves advanced engineering across design, testing, verification, and silicon delivery pipelines. Candidate will collaborate with multi-site engineering teams on high-performance compute and semiconductor architectures. Apply directly via official career portal.

Analog Devices

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Official opening at Analog Devices. Role involves advanced engineering across design, testing, verification, and silicon delivery pipelines. Candidate will collaborate with multi-site engineering teams on high-performance compute and semiconductor architectures. Apply directly via official career portal.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Field Application Engineer who’s wired for AI/ML, fluent in real-world problem-solving, and excited to build with the people actually using what we make. You will collaborate closely with the sales team and enterprise customers, leveraging your deep technical knowledge in AI to drive the adoption of our products and solutions. This is a customer-facing role that requires both technical expertise and excellent communication skills to convey complex technical concepts to non-technical stakeholders. This role is remote based out of Munich, Germany. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You’ve lived in the AI/ML trenches, whether as a field engineer, a solutions architect, or the one tapped in when things needed to “just work.” You speak both machine and human. Whether it’s a researcher or a skeptical executive, you know how to break things down and bring them to life. You’re fired up about generative models, LLMs, and the edge of what’s possible when software meets purpose-built silicon. Work directly with customers in meetings, presentations, and workshops to understand their technical challenges and provide effective solutions. Partner closely with sales operations and product teams to provide feedback from customers and help shape future product enhancements. What We Need Strong customer-facing skills with 5+ years of relevant technical, enterprise experience (such as Sales Engineer, Solutions Engineer, or Technical Account Manager). Your field insight will help shape our roadmap, our features, and the way we show up for developers. Proven expertise in AI technologies and frameworks, including machine learning, deep learning, natural language processing (NLP),computer vision, PyTorch or TensorFlow. Experience with embedded systems, FPGA Architecture or AI accelerators. Good understanding of data center, server architecture and deployment, thermal/power, and infrastructure management. What You Will Learn How to explore and push the boundaries of AI performance on custom silicon and help developers do the same. What it’s like to build the future from scratch, working alongside teams creating hardware, software, and everything in between. To master the craft of fine-tuning LLMs, optimizing vision models, and building AI pipelines that run at scale. An understanding of why field roles drive real impact turning on-the-ground insight into product breakthroughs and platform momentum. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Field Application Engineer who’s wired for AI/ML, fluent in real-world problem-solving, and excited to build with the people actually using what we make. You will collaborate closely with the sales team and enterprise customers, leveraging your deep technical knowledge in AI to drive the adoption of our products and solutions. This is a customer-facing role that requires both technical expertise and excellent communication skills to convey complex technical concepts to non-technical stakeholders. This role is remote based out of North America with preference near one of our main hubs Santa Clara, CA; Austin, TX; or Toronto,ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You’ve lived in the AI/ML trenches, whether as a field engineer, a solutions architect, or the one tapped in when things needed to “just work.” You speak both machine and human. Whether it’s a researcher or a skeptical executive, you know how to break things down and bring them to life. You’re fired up about generative models, LLMs, and the edge of what’s possible when software meets purpose-built silicon. Work directly with customers in meetings, presentations, and workshops to understand their technical challenges and provide effective solutions. Partner closely with sales operations and product teams to provide feedback from customers and help shape future product enhancements. What We Need Strong customer-facing skills with 5+ years of relevant technical, enterprise experience (such as Sales Engineer, Solutions Engineer, or Technical Account Manager). Your field insight will help shape our roadmap, our features, and the way we show up for developers. Proven expertise in AI technologies and frameworks, including machine learning, deep learning, natural language processing (NLP),computer vision, PyTorch or TensorFlow. Experience with embedded systems, FPGA Architecture or AI accelerators. Good understanding of data center, server architecture and deployment, thermal/power, and infrastructure management. What You Will Learn How to explore and push the boundaries of AI performance on custom silicon and help developers do the same. What it’s like to build the future from scratch, working alongside teams creating hardware, software, and everything in between. To master the craft of fine-tuning LLMs, optimizing vision models, and building AI pipelines that run at scale. An understanding of why field roles drive real impact turning on-the-ground insight into product breakthroughs and platform momentum. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design. This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A digital design expert with a deep understanding of computer architecture and IP microarchitecture. Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows. Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals. A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning. What We Need Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components. Performance-aware design decisions for compute, interconnect, or memory-heavy blocks. Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows. Strong synthesis and timing closure awareness to support backend teams. Prior experience in on-chip fabric and interconnect designs is an asset. What You Will Learn How cutting-edge AI chips are built, from spec to silicon. What it takes to collaborate with teams designing novel processor and memory architectures. How to blend custom logic with standard SoC elements for power and scale. How cross-functional workflows come together across design, DV, physical, and firmware teams. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Field Application Engineer who’s wired for AI/ML, fluent in real-world problem-solving, and excited to build with the people actually using what we make. You will collaborate closely with the sales team and enterprise customers, leveraging your deep technical knowledge in AI to drive the adoption of our products and solutions. This is a customer-facing role that requires both technical expertise and excellent communication skills to convey complex technical concepts to non-technical stakeholders. This role is remote based out of Munich, Germany; Poland or Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You’ve lived in the AI/ML trenches, whether as a field engineer, a solutions architect, or the one tapped in when things needed to “just work.” You speak both machine and human. Whether it’s a researcher or a skeptical executive, you know how to break things down and bring them to life. You’re fired up about generative models, LLMs, and the edge of what’s possible when software meets purpose-built silicon. Work directly with customers in meetings, presentations, and workshops to understand their technical challenges and provide effective solutions. Partner closely with sales operations and product teams to provide feedback from customers and help shape future product enhancements. What We Need Strong customer-facing skills with 5+ years of relevant technical, enterprise experience (such as Sales Engineer, Solutions Engineer, or Technical Account Manager). Your field insight will help shape our roadmap, our features, and the way we show up for developers. Proven expertise in AI technologies and frameworks, including machine learning, deep learning, natural language processing (NLP),computer vision, PyTorch or TensorFlow. Experience with embedded systems, FPGA Architecture or AI accelerators. Good understanding of data center, server architecture and deployment, thermal/power, and infrastructure management. What You Will Learn How to explore and push the boundaries of AI performance on custom silicon and help developers do the same. What it’s like to build the future from scratch, working alongside teams creating hardware, software, and everything in between. To master the craft of fine-tuning LLMs, optimizing vision models, and building AI pipelines that run at scale. An understanding of why field roles drive real impact turning on-the-ground insight into product breakthroughs and platform momentum. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a Verification Lead for our next-generation AI hardware. You’ll guide a top-tier team of Verification Engineers, shaping test strategies to validate functionality and performance of our AI core. This role requires expertise in AI-specific data types, common AI data-movement compute patterns, and on-chip network validation, combined with strong leadership and collaboration skills. This role is hybrid, based out Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A Seasoned Verification Leader: An experienced ASIC/SoC lead with proven track record of leading teams through complex tape-outs. An AI Hardware Specialist: An expert in the nuances of high-performance compute, specifically focused on AI/ML architectures and the intricacies of tensor-based operations. A Systems Architect at Heart: A strategist who views verification through a system-level lens, ensuring that hardware, software, and on-chip networks (NoC) harmonize perfectly. A Technical Mentor: A hands-on guide proficient in UVM, SystemVerilog, and cocotb, dedicated to elevating team capabilities and driving rigorous coverage-driven methodologies. What We Need Strategic AI Verification: Expertise in architecting verification plans for mixed-precision data types (FP8, BF16, INT8) and validating the accuracy of complex AI transformations. High-Performance NoC Expertise: Deep experience benchmarking on-chip networks under high-demand traffic, ensuring throughput, bandwidth, and congestion management meet peak requirements. Resiliency & Error Injection: A proactive approach to system stability, implementing robust concurrency controls and multi-core synchronization to handle edge-case failures. Platform-Agnostic Methodology: The ability to develop portable test strategies that scale seamlessly from subsystem-level simulations to FPGA and final Silicon. Cross-Functional Synergy: A collaborative mindset that bridges the gap between hardware architecture and software requirements to ensure performance targets are met. What You Will Learn Next-Gen AI/ML Tooling: Integrating your specific advanced automation frameworks and emerging AI-driven verification techniques into the existing lifecycle. Evolving Workload Dynamics: Gaining a deeper understanding of your proprietary AI workloads and how they stress memory access patterns uniquely within your architecture. Project-Specific Performance Bottlenecks: Identifying and mastering the unique architectural constraints of your specific SoC to push bandwidth limits further. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Graphcore

Verified

About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence Job Summary Applicants for this role should have strong experience designing, developing, and maintaining high-quality software systems. The role focuses on testing and validating a complex machine learning software stack, with particular emphasis on software architecture, automation, and engineering best practices. The ideal candidate is an experienced software engineer who values code quality, testability, and long-term maintainability, and enjoys building systems that other engineers rely on. This person will be comfortable working across large codebases, contributing to CI/CD infrastructure, and shaping technical direction through thoughtful design and mentoring in a technically demanding environment spanning ML frameworks, infrastructure, and AI accelerator hardware The Team The ML QA team is composed of highly skilled software engineers with a strong focus on automation, software quality, and data-driven validation. The team works closely with industry-standard machine learning frameworks and models, contributing to upstream open-source projects and collaborating across the wider software organization. Operating in a fast-paced environment, the team plays a critical role in ensuring reliability, performance, and maintainability across the ML software stack, helping to deliver robust and high-quality products to customers. Responsibilities and Duties Design, implement, and maintain robust test infrastructure and automation for a complex ML software stack. Architect and evolve test frameworks and tooling with a focus on scalability, maintainability, and developer experience. Build and maintain CI/CD pipelines targeting simulators, emulators (e.g. QEMU), and physical hardware. Create representative ML workloads and gain insights from their execution. (Numerical accuracy, performance analysis and benchmarking). Work closely with all Software development teams, supporting a culture of quality, security and maintainability. Review code and designs, setting a high bar for software engineering best practices. Mentor and support junior engineers, helping raise the overall technical capability of the team. Evaluate existing test strategies and infrastructure, identifying gaps and driving improvements aligned with team and organizational goals. Candidate Profile Essential: Experience in production-quality software engineering roles. Strong software design and architecture skills, with experience working on large or complex systems. Strong proficiency in Python, including experience building and maintaining production codebases. Solid experience with CI/CD systems and automated testing (preferably GitHub-based workflows). Experience working in Linux environments. Familiarity with C or C++, with the ability to read, debug, and reason about low-level code when needed. Proven ability to mentor junior engineers and influence engineering practices within a team. Strong problem-solving skills and a proactive, self-directed approach to work. Bachelor/Master's/PhD or equivalent experience in Computer Science, Maths, Machine Learning, Data Science, or related field. Desirable Exposure to machine learning frameworks such as PyTorch, JAX, Triton, TensorFlow Experience with distributed workload management systems such as Kubernetes, VLLM, Keras or MLOps pipelines Experience working with hardware simulators or emulators (e.g. QEMU). Experience developing for or working with FPGA-based systems. Experience with people management or mentoring Benefits In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments. Applicants for this position must hold the right to work in the UK. Unfortunately at this time, we are unable to provide visa sponsorship or support for visa applications

Graphcore

Verified

Staff Embedded SW/FW Engineer (Bringup) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team developing C code used to validate cutting-edge, high-performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Bringup team, you will be involved with bringing first silicon to life, developing code primarily in C to configure and exercise systems and sub-systems on new silicon devices, and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon bringup sequences and test in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy configuration sequences and validation tests on first silicon and debug them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Candidate Profile Essential: Strong experience in Bare metal / embedded C/C++ Good knowledge of digital ASICs. Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to collaborate with others to solve problems. Excellent problem-solving, analytical & diagnostic skills Desirable: Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable. Experience of Arm CPUs, System IP and debug tools. Experience of AMBA protocols. Understanding of ML applications and their workloads. Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support Benefits: In addition to a competitive salary, Graphcore offers a competitive benefits package. We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

Graphcore

Verified

Principal Post Silicon Validation Engineer (Bringup) Salary $241,100 - $326,100 + Phantom Equity + Benefits Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin which will play a central role in Graphcore's work building the future of AI computing. We are looking to hire Post-Silicon Validation Engineers to join our collaborative, cross-functional development team validating cutting edge, high performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Post-Silicon Validation team sits within the Architecture and Validation team, we are responsible for validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and also supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Essential skills: Strong experience in Bare metal / embedded C/C++ Good knowledge of digital ASICs Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to collaborate with others to solve problems Excellent problem-solving, analytical & diagnostic skills Desirable skills: Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable Experience of Arm CPUs, System IP and debug tools Experience of AMBA protocols Understanding of ML applications and their workloads Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

Graphcore

Verified

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software, and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers, and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to the Validation leadership team, the Principal Execution and Quality Validation Engineer will be responsible for driving validation execution, automation, product quality, and release readiness across Graphcore silicon and platform technologies. The role combines deep expertise in hardware validation, test automation, and quality engineering with a strong focus on execution excellence. Working closely with architecture, design, verification, firmware, software, systems engineering, and validation teams, the successful candidate will develop scalable validation methodologies, improve test coverage and execution efficiency, and ensure products meet the highest standards of functionality, reliability, and performance before customer deployment. As a recognized technical leader within the validation organisation, this role will influence validation strategies, automation roadmaps, and quality practices across multiple projects and engineering disciplines. The Team The Validation Execution and Quality team sits within the Validation organisation and is responsible for improving validation effectiveness, test execution efficiency, product quality, and release readiness across Graphcore silicon and platform products. The team develops validation methodologies, automation frameworks, test execution infrastructure, and quality processes that enable engineering teams to execute validation activities at scale. Working closely with validation, architecture, firmware, software, systems, and design teams, the group helps ensure products are thoroughly validated before release. Responsibilities and Duties Define and drive validation strategies for complex silicon, subsystem, and platform technologies, ensuring comprehensive coverage across functional, performance, reliability, and stress testing Leverage advanced hardware knowledge to plan, optimize, verify, and test critical electronic systems, including silicon, FPGA-based platforms, test systems, and associated validation infrastructure Develop and execute validation plans that ensure products meet quality, reliability, and performance objectives before release Create detailed test plans from high-level validation requirements and test cases, ensuring timely execution and high-fidelity results Design, develop, and maintain automation frameworks that enable rapid execution of test plans, regression suites, and validation activities Lead silicon and platform validation activities from bring-up through product readiness Conduct complex analysis of validation results and system behaviour to identify issues and opportunities for improvement Collaborate with architecture, design, verification, firmware, software, systems engineering, and validation teams to implement new validation requirements and improve test coverage Integrate new validation capabilities, methodologies, and test solutions into existing validation infrastructure to improve productivity, quality, and execution efficiency Develop automated data collection, analysis, and reporting solutions to improve engineering visibility and decision-making Evaluate complex design features to identify functional, compatibility, integration, and reliability risks Investigate and drive resolution of complex validation failures through structured debug and root-cause analysis methodologies Assess validation techniques, workflows, and engineering processes, introducing automation and process improvements to maximize productivity Support power, performance, and system-level validation activities through development of scalable validation infrastructure and methodologies Influence validation roadmaps, infrastructure development, and engineering best practices across the validation organisation Act as the final validation authority for assigned areas, ensuring issues are identified and resolved before products reach customers Drive continuous improvement initiatives that improve validation quality, execution efficiency, and engineering productivity Mentor engineers on validation methodologies, automation frameworks, test execution strategies, and quality practices Candidate Profile Essential: Strong experience in silicon validation, hardware validation, system validation, or related engineering disciplines Deep understanding of validation methodologies, test planning, test execution, and quality processes Strong experience developing automation frameworks for validation, regression execution, and test orchestration Expert-level Python programming skills for automation, data analysis, and infrastructure development Strong understanding of hardware systems, silicon bring-up, and validation workflows Experience translating high-level requirements into structured validation plans, test cases, and measurable quality outcomes Experience analysing validation results and driving root-cause investigations for complex technical issues Strong understanding of validation coverage, quality metrics, release readiness criteria, and risk assessment methodologies Experience collaborating across architecture, design, verification, firmware, software, systems, and validation teams Excellent analytical, diagnostic, and problem-solving skills Exceptional communication skills and the ability to influence technical direction across multidisciplinary engineering teams Ability to independently lead complex technical initiatives and drive adoption of new validation methodologies and tools Desirable Experience with post-silicon bring-up and system integration activities Experience developing large-scale regression systems and automated test execution infrastructure Experience with FPGA-based validation environments Experience automating laboratory equipment and validation environments Familiarity with CI/CD systems and continuous testing methodologies Experience developing dashboards, reporting systems, or engineering analytics tools Experience with C, C++, or embedded software development Experience working on AI accelerator, high-performance compute, or semiconductor products Experience defining organisational validation standards, quality metrics, and engineering best practices

Graphcore

Verified

Principal Embedded SW/FW Engineer (Bringup) - Bengaluru, multiple vacancies Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Candidate Profile Essential: Understanding of ML applications and their workloads A self-starter who can apply independent judgement A team player able to lead and support colleagues with difficult concepts Strong experience in Bare metal / embedded C/C++ Excellent problem-solving, analytical & diagnostic skills Ability to work across teams and programming languages to find root causes of critical and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to explain difficult concepts to resolve issues Desirable 10+ years experience Experience building and leading, multi-site teams Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable. Experience of Arm CPUs, System IP and debug tools. Experience of AMBA protocols. Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,

Graphcore

Verified

Principal Embedded SW/FW Engineer (Bringup) - Austin, Tx, USA Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Candidate Profile Essential: Understanding of ML applications and their workloads A self-starter who can apply independent judgement A team player able to lead and support colleagues with difficult concepts Strong experience in Bare metal / embedded C/C++ Excellent problem-solving, analytical & diagnostic skills Ability to work across teams and programming languages to find root causes of critical and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to explain difficult concepts to resolve issues Desirable 5 to 10 years’ experience Experience building and leading, multi-site teams Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable. Experience of Arm CPUs, System IP and debug tools. Experience of AMBA protocols. Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,

Graphcore

Verified

About Graphcore Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. The Role: We are looking to hire Post-Silicon Validation Engineers to join our collaborative, cross-functional development team validating cutting edge, high performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Post-Silicon Validation team sits within the Architecture and Validation team, we are responsible for validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and also supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Essential skills: Strong experience in Bare metal / embedded C/C++ Good knowledge of digital ASICs Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to collaborate with others to solve problems Excellent problem-solving, analytical & diagnostic skills Desirable skills: Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable Experience of Arm CPUs, System IP and debug tools Experience of AMBA protocols Understanding of ML applications and their workloads Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support Benefits: In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

Graphcore

Verified

About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence. The Team The Verification team sits within the Silicon Design organisation. We ensure that the RTL delivered by Logical Design and used by Physical Design team implements Graphcore’s architectural needs and meets the company's quality standards. As a Director of Silicon Verification, you will help lead this multi-site organisation, define verification strategies across multiple silicon programs, and drive best in class execution to ensure high-quality, high-performance silicon delivery. Role Summary We are seeking a proven leader to help direct Graphcore’s verification strategy and methodologies. This role sets direction for the verification lifecycle including - planning, infrastructure, execution, coverage closure, debug strategy and sign-off for Graphcore’s complex, high performance AI accelerators. Reporting to the Senior Director of Verification the Director will partner closely with other teams such as Architecture, Logical Design, Physical Design, DFT, Systems as well as Program Management teams to ensure accurate implementation, accelerated debug cycles, high coverage confidence and predictable silicon delivery. Responsibilities Leadership & Strategy Define the long-term vision, roadmap and strategy for silicon functional verification across all Graphcore silicon programs. Build, lead, and develop a high performing, globally distributed verification organisation. Establish scalable methodologies, leading edge verification techniques, and best practice processes. Drive automation, tooling and infrastructure evolution to improve productivity and verification quality. Evaluate emerging tools and technologies and drive adoption to deliver competitive advantage. Technical Ownership Own verification planning, execution and sign off for all RTL blocks and top-level SoCs. Oversee definition of test plans including functional coverage targets. Drive close through prioritisation of test content and coverage signoff. Iterate plans to close verification gaps. Direct debugging strategies, triage processes and root-cause analysis workflows to enhance team productivity. Steer integration of verification technologies including formal methods, simulation acceleration/emulation and system level validation. Cross Functional Collaboration Ensure high quality feedback to other functions within the Silicon Team. Partner with Architecture to influence and refine specifications for verifiability and risk reduction. Collaborate with Logical Design to align on design intent, architectural corner cases and test scenarios. Work closely with Physical Design and DFT teams to ensure coherent verification of interfaces, timing assumptions and test structures. Lead post-silicon debug alignment where needed, ensuring learning cycles feed back into RTL and verification methodology. Execution & Delivery Deliver verification sign off on schedule across multiple parallel projects. Guide program risk management, resource planning, milestone creation, and verification budgeting. Drive consistent metrics-based verification management (structural and functional coverage, bug funnels, simulation performance, CI health, etc.). Provide scheduled reports into program management on progress with associated metrics based collaterol. Essential Skills Demonstrated ability to lead, scale and inspire high performing verification teams. Extensive verification leadership experience within CPU, GPU, ASIC or SoC environments. Deep understanding of modern verification methodologies, flows, and infrastructure. Strong capability in SystemVerilog, Python, C++ and Linux-based workflows. Expertise in diagnosing complex logic issues across RTL, testbench and system level domains. Strong communication, collaboration and stakeholder management skills across global sites. Desirable Skills UVM and advanced SystemVerilog Assertions (SVA). Experience with assembly languages and compiler toolchains (LLVM, GCC). Knowledge of DVCS tools (e.g., Git). Familiarity with distributed compute systems (SGE or other DRMS). Experience with XML, XPath/XSLT. Web technologies such as HTML/DOM, JavaScript, SQL. Exposure to emulation, FPGA prototyping, or formal verification tools. Benefits In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Engineer, SoC RTL Engineer We are looking for a Digital Design Engineer to help build and optimize high-performance chiplet-based SoC architectures. This role is ideal for passionate junior engineers or recent graduates who want to grow their career at the intersection of microarchitecture, RTL implementation, and performance/power-aware design. Location: Tokyo, Japan (Hybrid - Flexible working hours and remote work options available) We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Benefits & Work Style at Tokyo Office Competitive Salary: We offer a competitive compensation package aligned with industry standards, your baseline skills, and potential. Flexible Work Culture: To support a healthy work-life balance, we offer flexible working hours (flextime) and remote work options (hybrid style) based out of our Tokyo office. Who You Are An Aspiring Digital Design Engineer: You have a solid foundational understanding of computer architecture and digital logic design. Eager to Learn RTL: You have academic or internship experience in RTL development (SystemVerilog) and are excited to learn the full ASIC flow. PPA Conscious: You understand the basic concepts of optimizing for Power, Performance, and Area (PPA). Collaborative & Curious: You are a natural team player who thrives on learning from peers, participating in code reviews, and asking questions. Problem Solver: You possess strong analytical skills and a desire to tackle complex hardware design challenges. What You Will Do (What We Need) HDL Coding: Utilize hardware description languages (SystemVerilog) to implement and modify custom IP blocks and SoC components under the guidance of senior mentors. RTL Implementation: Assist in the design and integration of compute, interconnect, or memory-heavy blocks. Verification Support: Contribute to verification and validation efforts using emulation, FPGA prototyping, or basic UVM flows. Collaborate Across Teams: Work closely with senior engineers to understand design specifications and support backend synthesis and timing closure teams. Bonus Points: Basic understanding of RISC-V Architecture, on-chip fabric/interconnect designs, DFT, or basic hardware debugging experience is preferable but not required. What You Will Learn Advanced Chiplet Design: How cutting-edge chiplet designs are built, from initial spec to silicon. Industry-Leading Collaboration: What it takes to collaborate with global teams designing novel processor and memory architectures. Cross-Functional Workflows: How design, Design Verification (DV), physical design, and firmware teams come together to deliver world-class AI hardware. Mentorship: Receive hands-on guidance and mentorship from industry-leading silicon experts. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy and execution for next-generation RISC-V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon validation. The ideal candidate has verified complex out-of-order, speculative, superscalar CPUs and can define scalable methodology across simulation, formal verification, emulation, FPGA, and silicon bring-up. This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have deep experience verifying high-performance superscalar CPUs, ideally including out-of-order and speculative processors. You have strong knowledge of RISC-V architecture, including ISA compliance, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior. You are highly proficient in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and advanced debug methodologies. You have hands-on experience with CPU reference models, instruction generators, ISS-based checking, or differential testing. You bring practical expertise with formal verification and large-scale CPU verification environments. What We Need A verification leader who can own strategy for RISC-V high-performance superscalar CPUs and CPU subsystems. An expert who can drive verification planning for out-of-order, speculative, superscalar microarchitectures. A technical leader who can build and scale test plans, coverage, checkers, assertions, scoreboards, and constrained-random environments. Someone who can verify key CPU features including frontend, branch prediction, rename, scheduling, execution, load-store, memory ordering, cache hierarchy, retirement, exceptions, interrupts, debug, and coherency interactions. A cross-functional partner who can work closely with architecture, RTL, performance modeling, SoC, firmware, compiler, and validation teams while mentoring senior engineers and establishing best practices across the CPU verification organization. What You Will Learn How Tenstorrent develops next-generation RISC-V high-performance superscalar processors from early design through tapeout and post-silicon validation. How CPU verification strategy scales across simulation, formal verification, emulation, FPGA prototyping, and silicon bring-up. How advanced CPU features such as coherency, virtual memory, atomics, vector extensions, and custom extensions are verified in complex real-world systems. How to drive verification closure, bug triage, root-cause analysis, coverage closure, and tapeout readiness at the highest levels of technical leadership. How Tenstorrent teams collaborate across architecture, design, firmware, compiler, and validation to build cutting-edge compute products. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Graphcore

Verified

Senior Post Silicon Validation Engineer (Bringup) Salary $156,500 - $211,700 + Phantom Equity + Benefits Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin which will play a central role in Graphcore's work building the future of AI computing. We are looking to hire Post-Silicon Validation Engineers to join our collaborative, cross-functional development team validating cutting edge, high performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Post-Silicon Validation team sits within the Architecture and Validation team, we are responsible for validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and also supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Essential skills: Strong experience in Bare metal / embedded C/C++ Good knowledge of digital ASICs Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to collaborate with others to solve problems Excellent problem-solving, analytical & diagnostic skills Desirable skills: Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable Experience of Arm CPUs, System IP and debug tools Experience of AMBA protocols Understanding of ML applications and their workloads Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.